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ADP1653
APPLICATIONS INFORMATION
FLASH CURRENT FOLDBACK DURING TRANSMIT
A logic high to R2 changes the direction of the current in R2.
PULSE
I REF = I R1 ? I R2
(7)
The ADP1653 allows a fast, 1.8 V logic-enabled foldback of the
flash current, typically enabled shortly before an RF transmit
pulse. This feature extends the life of the battery by preventing
I REF =
1 . 22 V
R1
?
V Tx mask ? 1 . 22 V
R2
(8)
overstress of the battery cell. It also extends the life of the phone
by reducing the maximum instantaneous system current that
can occur, allowing a lower battery operating voltage limit.
I HPLED = I REF × 20,800
The ratio of full flash current to reduced flash current for
a 1.8 V logic signal is approximately
(9)
R2 ?
2-Bit Logic Interface Mode (INTF = 1)
In 2-bit logic interface mode, the flash current is set with an
external resistor. The 1.22 V reference voltage is buffered to the
Full Flash
Reduced Flash
=
R2 + R1
R1
2
(10)
SETF pin, generating a reference current across an external SETF
resistor. This reference current is multiplied by a fixed gain to
set the flash current in the HPLED.
A 1.8 V compatible logic signal selects normal or reduced flash
current by adjusting the reference current, as shown in Figure 29
and Figure 30.
CURRENT
MIRRORS
If R1 = R2 = 100 kΩ, the maximum flash current is 500 mA,
and the reduced flash current is 125 mA.
I 2 C Mode (INTF = 0)
To allow flash current foldback in I 2 C mode, the user should
connect a resistor between SETF and ground, and another
resistor from SETF to the logic input, as shown in Figure 29 and
Figure 30. Operation is the same as for the 2-bit logic interface
mode, except the flash current is additionally scaled by setting
the HPLED bits in the OUT_SEL register.
1.22V
IREF
Full current flash mode (Tx mask = 0 V) has a flash current of
R2
1.22V
SETF
I HPLED = ( 35 mA + Code × 15 mA) ×
where:
50 kΩ
R SETF
(11)
DIGITAL
OUTPUT
TxMASK = 0V
1.22V/R2
R1
1.22V/R1
R SETF is a parallel combination of R1 and R2.
Code is the HPLED register setting.
Figure 29. Flash Mode Current Foldback
(Normal Operation with R2 Grounded Through Digital Control Signal)
Bring the Tx mask voltage high for reduced reference current.
Therefore, the reduced LED current is I HPLED (see Equation 13).
I REF _ 0 =
1 . 22 V 1 . 22 V × ( R1 + R2 )
1 . 22 V V Tx mask ? 1 . 22 V
Full current flash mode has a reference current of
=
R1 || R2 R1 × R2
The reference current is multiplied by a fixed gain to give the
(6)
I REF = ?
R1 R2
I HPLED = ( 35 mA + Code × 15 mA) ×
50 kΩ × I REF
1 . 22 V
(12)
(13)
actual flash current (see Table 8).
CURRENT
MIRRORS
IREF
1.22V
1.22V
1.8V
DIGITAL
OUTPUT
TxMASK = 1.8V
R2
0.6V/R2
R1
SETF
1.22V/R1
Figure 30. Flash Mode Current Foldback with 1.8 V Signal Applied to R2
Rev. B | Page 17 of 24
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